The invention relates to variable gain logarithmic attenuators and amplifiers, and more particularly to programmable low noise, more accurate CMOS logarithmic attenuators/amplifiers than those disclosed in my commonly assigned U.S. Pat. No. 5,880,618.
The subject matter of this invention is similar to that of the inventor's commonly assigned U.S. Pat. No. 5,880,618, issued Mar. 9, 1999, which is incorporated herein by reference.
Logarithmic attenuator structure 10 in FIG. 1 is essentially the same as shown in FIG. 3 of the '618 patent. Input voltage V.sub.IN is applied to conductor 11. A suitable number of transistors, in this example, Q1, Q3, Q5, Q7, and Q9, are connected in series between conductor 11 and conductor 12. V.sub.OUT is produced on conductor 12, and is a logarithmically attenuated representation of V.sub.IN. Each of series transistors Q1, Q3, Q5, Q7, and Q9 are the same size, and each has the same on resistance. Each is biased so as to always be on. The total series resistance between V.sub.IN and V.sub.OUT is equal to the above on resistance multiplied by the number of series transistors.
Each intermediate node between the various series-connected transistors Q1,Q3 . . . Q9 of prior art FIG. 1 is connected to a shunt transistor Q2, Q4, Q6, Q8, and Q10, respectively. The source electrodes of Q2, Q4, Q6, Q8, and Q10 are connected to a fixed common mode reference voltage V.sub.CM on conductor 13.
FIG. 2 shows a sequence of control voltages V1,V2 . . . V10, the same as in FIG. 4 of the above mentioned '618 patent. By applying the sequential control voltages V1, V2, V3, V4, V5 as shown in the upper graph in FIG. 2, fairly linear attenuation measured in decibels (dB) is achieved if the on resistances of each of the shunt resistors Q2,Q4 . . . Q10 are equal.
As the number of stages each receiving a respective sequential control voltage V1, V2, V3 etc. is increased, the number of the cusps 27A in the gain transfer characteristic shown at the bottom of FIG. 2 is increased, and the magnitude of each cusp is reduced. The effect of the noise signals would be significantly less if the series resistance between V.sub.IN and V.sub.OUT were significantly reduced. A problem with the logarithmic attenuator circuit shown in prior art FIG. 1 is that "noise" signals are generated when the shunt transistors Q2,Q4 . . . Q10 are turned off.
Thus, there are unmet needs for a low noise logarithmically controlled attenuator, a low noise, low distortion logarithmically controlled amplifier, a programmable low noise, programmable logarithmically controlled amplifier, and a programmable low noise, low distortion logarithmically controlled attenuator, all of which are unmet by the prior art.